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authorTakamichi Horikawa <myon@myon98.net>2021-12-04 13:41:35 +0900
committerTakamichi Horikawa <myon@myon98.net>2021-12-04 13:41:35 +0900
commit74fe5e24beb14b00ce3d69e5a3010c520d4bf8e5 (patch)
tree7977c7d2df8f02bdea1a2fc0dd50df000eb044e6
Initial: vram write test
-rw-r--r--.gitignore2
-rw-r--r--00-disptest/Makefile3
-rw-r--r--00-disptest/start.S39
-rw-r--r--01-ctest/Makefile3
-rw-r--r--01-ctest/main.c18
-rw-r--r--01-ctest/start.S25
-rw-r--r--01-ctest/test.h5
-rw-r--r--README.md28
-rw-r--r--common.mk14
9 files changed, 137 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..e494714
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,2 @@
+*.elf
+*.o
diff --git a/00-disptest/Makefile b/00-disptest/Makefile
new file mode 100644
index 0000000..338bf5d
--- /dev/null
+++ b/00-disptest/Makefile
@@ -0,0 +1,3 @@
+TARGET:=disptest.elf
+OBJS:=start.o
+include ../common.mk
diff --git a/00-disptest/start.S b/00-disptest/start.S
new file mode 100644
index 0000000..aee4759
--- /dev/null
+++ b/00-disptest/start.S
@@ -0,0 +1,39 @@
+#define VRAMADDR 0x14800000
+#define DISPH 480
+#define DISPW 800
+
+.globl start
+.arm
+start:
+// r0: y, r1: x
+ mov r0, #0
+ mov r1, #0
+
+.Lloopy:
+ cmp r0, #(DISPH)
+ beq .Lstop
+.Lloopx:
+ cmp r1, #(DISPW)
+ bne .Lcontx
+ mov r1, #0
+ add r0, #1
+ b .Lloopy
+.Lcontx:
+// r2: ((y&0)^(x&0)) ? 0xffffffff : 0
+ eor r2, r0, r1
+ and r2, #1
+ sub r2, #1
+// addr: VRAMADDR + (y*DISPW + x)*2
+ mov r3, #(DISPW)
+ mul r3, r0
+ add r3, r1
+ add r3, r3
+ add r3, #(VRAMADDR)
+// store the pixel
+ strh r2, [r3]
+
+ add r1, #1
+ b .Lloopx
+.Lstop:
+ b .Lstop
+
diff --git a/01-ctest/Makefile b/01-ctest/Makefile
new file mode 100644
index 0000000..84e84e4
--- /dev/null
+++ b/01-ctest/Makefile
@@ -0,0 +1,3 @@
+TARGET:=dispctest.elf
+OBJS:=start.o main.o
+include ../common.mk
diff --git a/01-ctest/main.c b/01-ctest/main.c
new file mode 100644
index 0000000..fb7ec73
--- /dev/null
+++ b/01-ctest/main.c
@@ -0,0 +1,18 @@
+#include <stdint.h>
+
+enum {
+ DISPH = 480,
+ DISPW = 800,
+};
+
+void cstart(void)
+{
+ uint16_t * const dptr = (uint16_t *)0x14800000;
+
+ for (int y = 0; y < DISPH; y++) {
+ for (int x = 0; x < DISPW; x++) {
+ dptr[y*DISPW+x] = ((x&1)^(y&1)) ? 0 : 0xffff;
+ }
+ }
+}
+
diff --git a/01-ctest/start.S b/01-ctest/start.S
new file mode 100644
index 0000000..933bf48
--- /dev/null
+++ b/01-ctest/start.S
@@ -0,0 +1,25 @@
+#define VRAMADDR 0x14800000
+#define DISPH 480
+#define DISPW 800
+
+#define DRAM_START 0xa0000000
+#define DRAM_END 0xa4000000
+
+.globl start
+.arm
+start:
+ @setup stack
+ ldr sp, =(DRAM_END)
+ @initialize bss
+ ldr r0, =_edata
+ ldr r1, =_end
+ mov r2, #0
+.Lbssloop:
+ cmp r0, r1
+ bhs .Lbssloopend
+ stmia r0!, {r2}
+ b .Lbssloop
+.Lbssloopend:
+ blx cstart
+.Lhalt:
+ b .Lhalt
diff --git a/01-ctest/test.h b/01-ctest/test.h
new file mode 100644
index 0000000..6290759
--- /dev/null
+++ b/01-ctest/test.h
@@ -0,0 +1,5 @@
+#ifndef MYON_TEST_H_INCLUDED
+#define MYON_TEST_H_INCLUDED
+int add(int a, int b);
+int addt(int a, int b) __attribute__((target("thumb")));
+#endif // MYON_TEST_H_INCLUDED
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..6006693
--- /dev/null
+++ b/README.md
@@ -0,0 +1,28 @@
+# Sigmarion III baremetal tests
+This is a collection of programs meant to run on baremetal Sigmarion III,
+which can be run with hpcboot.exe from NetBSD.
+
+This is an attempt to create a working example of basic display and keyboard driver (and possibly other hardware devices), in order to port OSes to run on the Pocket PC.
+
+## Build and boot instructions
+By default, clang is used for compiling, but arm-none-eabi-gcc can also be used. See or edit common.mk for toolchain options.
+
+Go to each of the directories and run GNU make to obtain a *.elf file, which can be copied to the Sigmarion III and run with NetBSD's hpcboot.exe. For the platform, I tend to use W-ZERO3 but any platforms with PXA2X0 should work (see [sys/arch/hpc/conf/platid.def](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/hpc/conf/platid.def?rev=1.26&content-type=text/x-cvsweb-markup&only_with_tag=MAIN)).
+
+## TODO
+* Currently the entry point is changed from virtual 0xc020_0000 (as per NetBSD [sys/arch/hpcarm/conf/std.pxa2x0](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/hpcarm/conf/std.pxa2x0?rev=1.1&content-type=text/x-cvsweb-markup&only_with_tag=MAIN)) to physical 0xa020_0000 and does away with the virtual address mapping, but how robust is this?
+* Even though this overwrites the RAM area that might be the file storage region, and there's a chance the filesystem will be corrupted after the next soft reboot. Is there a way to trigger a hard reset, or a way to determine the split between storage and program memory?
+* In contrast to how well the PXA255 is documented, there seems to be very little information about the video chip which may or may not be Imageon 3200 or 4200. It's trivial to use the 0x1480_0000 region inside the VRAM which gets configured by the WinCE, but it may be necessary to reconfigure it after a sleep or a reboot.
+* arm-none-eabi-gcc seems to generate a thumb interwork while clang uses BLX
+
+## Hardware
+### Memory map
+* 0xa000_0000 - 0xa400_0000: 64MB RAM
+* 0x1480_0000 - : VRAM (16bpp)
+
+### I2C
+* 0x11: Keyboard?
+
+## References
+* Intel PXA255 datasheets/manuals
+* [Inside Sigmarion III](https://z.apps.atjp.jp/sig3/)
diff --git a/common.mk b/common.mk
new file mode 100644
index 0000000..19a7dcd
--- /dev/null
+++ b/common.mk
@@ -0,0 +1,14 @@
+TOOLPRE:=arm-none-eabi-
+CC:=$(TOOLPRE)gcc -ffreestanding -march=armv5te -mabi=aapcs-linux -mthumb
+LD:=$(TOOLPRE)ld
+#CC:=clang -target arm-none-eabi -ffreestanding -march=armv5te -mabi=aapcs-linux -mthumb
+#LD:=ld.lld -m armelf
+CFLAGS:=-O2 -Wall -Wextra
+.PHONY: all clean
+LDFLAGS:=-Ttext 0xa0200000 -e start
+
+$(TARGET): $(OBJS)
+ $(LD) $(LDFLAGS) -o $@ $^
+
+clean:
+ rm -f *.o $(TARGET)