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#define VRAMADDR 0x14800000
#define DISPH 480
#define DISPW 800
#define DRAM_START 0xa0000000
#define DRAM_END 0xa4000000
.globl start
.arm
start:
@setup stack
ldr sp, =(DRAM_END)
@initialize bss
ldr r0, =_edata
ldr r1, =_end
mov r2, #0
.Lbssloop:
cmp r0, r1
bhs .Lbssloopend
stmia r0!, {r2}
b .Lbssloop
.Lbssloopend:
blx cstart
.Lhalt:
b .Lhalt
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