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authorTakamichi Horikawa <myon@myon98.net>2021-12-04 13:41:35 +0900
committerTakamichi Horikawa <myon@myon98.net>2021-12-04 13:41:35 +0900
commit74fe5e24beb14b00ce3d69e5a3010c520d4bf8e5 (patch)
tree7977c7d2df8f02bdea1a2fc0dd50df000eb044e6 /00-disptest
Initial: vram write test
Diffstat (limited to '00-disptest')
-rw-r--r--00-disptest/Makefile3
-rw-r--r--00-disptest/start.S39
2 files changed, 42 insertions, 0 deletions
diff --git a/00-disptest/Makefile b/00-disptest/Makefile
new file mode 100644
index 0000000..338bf5d
--- /dev/null
+++ b/00-disptest/Makefile
@@ -0,0 +1,3 @@
+TARGET:=disptest.elf
+OBJS:=start.o
+include ../common.mk
diff --git a/00-disptest/start.S b/00-disptest/start.S
new file mode 100644
index 0000000..aee4759
--- /dev/null
+++ b/00-disptest/start.S
@@ -0,0 +1,39 @@
+#define VRAMADDR 0x14800000
+#define DISPH 480
+#define DISPW 800
+
+.globl start
+.arm
+start:
+// r0: y, r1: x
+ mov r0, #0
+ mov r1, #0
+
+.Lloopy:
+ cmp r0, #(DISPH)
+ beq .Lstop
+.Lloopx:
+ cmp r1, #(DISPW)
+ bne .Lcontx
+ mov r1, #0
+ add r0, #1
+ b .Lloopy
+.Lcontx:
+// r2: ((y&0)^(x&0)) ? 0xffffffff : 0
+ eor r2, r0, r1
+ and r2, #1
+ sub r2, #1
+// addr: VRAMADDR + (y*DISPW + x)*2
+ mov r3, #(DISPW)
+ mul r3, r0
+ add r3, r1
+ add r3, r3
+ add r3, #(VRAMADDR)
+// store the pixel
+ strh r2, [r3]
+
+ add r1, #1
+ b .Lloopx
+.Lstop:
+ b .Lstop
+